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Improved Doherty Amplifier Design with Minimum Phase Delay in Output Matching Network for Wideband Application

机译:宽带应用中输出匹配网络中具有最小相位延迟的改进Doherty放大器设计

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摘要

This letter presents an improved Doherty power amplifier (DPA) for high-efficiency and wideband operations. To achieve the impedance transformations both in the low power region and at saturation, a design approach is proposed to determine the desired minimum phase delays of the carrier and peaking output matching networks, which can simplify the load modulation network of the DPA and extend the bandwidth. For verification, a 1.6-2.2 GHz asymmetric DPA was designed and measured. The designed DPA can deliver an efficiency of 51%-55% at 10 dB back-off power over the whole band. For a 20 MHz LTE signal, an average efficiency of higher than 50% can be achieved at 36 dBm average output power with the linearity of -48 dBc after linearization across the band.
机译:这封信提出了一种改进的Doherty功率放大器(DPA),用于高效率和宽带操作。为了在低功率区域和饱和状态下均实现阻抗变换,提出了一种设计方法来确定所需的载波和峰值输出匹配网络的最小相位延迟,这可以简化DPA的负载调制网络并扩展带宽。为了验证,设计并测量了1.6-2.2 GHz非对称DPA。设计的DPA可以在整个频带上以10 dB的退避功率提供51%-55%的效率。对于20 MHz LTE信号,在整个频带线性化之后,在36 dBm平均输出功率和-48 dBc的线性下,可以实现高于50%的平均效率。

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